Intel Starts Shipping New 10nm Agilex FPGAs to Early Customers including Microsoft

Intel announced that it has started shipping its 10m Agilex FPGAs to early access customers. It features the computer express link (CXL), a cache and memory coherent CPUs. Intel first announced the chips in April. Intel says they would use Agilex to design solutions for networking, 5G and accelerated data analytics.

The 10nm Agilex FPGA offers up to 40% higher performance, it also supports for DDR4 and DDR5, Optane DC persistent memory DIMMS and high bandwidth memory (HBM), it is also compatible with both PCL 4.0 and PCL 5.0. Agilex comes with a 3D Silicon-in-Package (SiL) technology, which is capable of performing every kind of computing task.

“This combination of advanced technologies allows Intel to integrate analogue, memory, custom computing, custom I/O, and Intel eASIC device tiles into a single package along with the FPGA fabric,” Intel said.

Agilex FPGA is a product of the Altera group bought by Intel for $16.7 million in 2015, it had previously sold FPGAs under the brand name “Stratix”, but this is the first FPGA that has been unveiled under the ownership of  Intel. CXL replaces the OmniPath connect, a fabric developed by Intel but because it wasn’t supported by anyone, the company abandoned OmniPath this month in favour of CXL which has wide industry support.

Agilex offers 2x DSP floating-point performance using FP16 and BFLOAT16 data format, it supports up to 112 Gbps data rates for high-speed networking requirements for 400GE and beyond.

Intel says that the early access customers include Colorado engineering Incorporation, Microsoft, Silicon and Mantaro networks. Microsoft has already mentioned that it plans to use Agilex in many of its upcoming projects. Intel offers a “Custom logic continuum” that allows developers to transfer designs from FPGAs to ASICs.

“The Intel Agilex FPGA product family leverages the breadth of Intel innovation and technology leadership, including architecture, packaging, process technology, developer tools and a fast path to power reduction with eASIC technology. said Dan McNamara, SVP of Networking and Custom logic group at Intel.

These unmatched assets enable new levels of heterogeneous computing, system integration, and processor connectivity and will be the first 10nm FPGA to provide cache-coherent and low latency connectivity to Intel Xeon processors with the upcoming Compute Express Link,”

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